Apparatus for continuous phase quadrature amplitude modulation and demodulation

ABSTRACT

An apparatus for continuous phase quadrature amplitude modulation and demodulation to continuously process phases and amplitudes at symbol change points in an M-ary quadrature amplitude modulation method. The apparatus includes a continuous phase quadrature modulator having a first multiplier multiplying an I-channel by a cosine wave weighted function, a second multiplier multiplying an output signal of the first multiplier by a cosine wave of a carrier frequency, a delay delaying a Q-channel by a predetermined time, a third multiplier multiplying the Q-channel by a sine wave weighted function, a fourth multiplier multiplying an output signal of the third multiplier by the sine wave of the carrier frequency, and an adder adding an output signal of the second multiplier and an output signal of the fourth multiplier; and a continuous phase quadrature demodulator having a fifth multiplier multiplying the I-channel by the cosine wave of the carrier frequency, a sixth multiplier multiplying a signal from the fifth multiplier by the cosine wave weighted function, a first integrator and sampler integrating a signal from the sixth multiplier for the symbol duration time, a seventh multiplier multiplying the Q-channel by the sine wave of the carrier frequency, an eighth multiplier multiplying a signal from the seventh multiplier by the sine wave weighted function, and a second integrator and sampler integrating a signal from the eighth multiplier by the symbol duration time.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an apparatus for continuous phasequadrature amplitude modulation and demodulation, and more particularly,to an apparatus for continuous phase quadrature amplitude modulation anddemodulation to continuously process phases and amplitudes at symbolchange points in an M-ary quadrature amplitude modulation method.

2. Description of the Related Art

In general, phases are discontinuous at symbol change points in aquadature amplitude modulation method and a quadrature amplitudedemodulation method. Accordingly, since a side-lobe does not droprapidly, an adjacent channel interference occurs. In addition, since theamplitudes are discontinuous at symbol change points, a power amplifierhas to quickly follow the amplitude.

SUMMARY OF THE INVENTION

To solve the above-described problems, it is an objective of the presentinvention to provide an apparatus for continuous phase quadratureamplitude modulation and demodulation to improve a spectrum efficiencyby making the phases continuous at symbol change points of a quadratureamplitude modulation signal.

To solve the above-described problems, it is another objective of thepresent invention to provide an apparatus for continuous phasequadrature amplitude modulation and demodulation to reduce an adjacentchannel interference by improving the roll-off speed of a side-lobe.

To solve the above-described problems, it is still another objective ofthe present invention to provide an apparatus for continuous phasequadrature amplitude modulation and demodulation to reduce loads of apower amplifier by making the changes continuous in amplitude at symbolchange points.

To meet the above objective, according to one aspect of the presentinvention, there is provided an apparatus for continuous phasequadrature amplitude modulation and demodulation comprising a continuousphase quadrature modulator having a first multiplier multiplying anI-channel by a cosine wave weighted function, a second multipliermultiplying an output signal of the first multiplier by a cosine wave ofa carrier frequency, a delay delaying a Q-channel by a predeterminedtime, a third multiplier multiplying the Q-channel by a sine waveweighted function, a fourth multiplier multiplying an output signal ofthe third multiplier by the sine wave of the carrier frequency, and anadder adding an output signal of the second multiplier and an outputsignal of the fourth multiplier; and a continuous phase quadraturedemodulator having a fifth multiplier multiplying the I-channel by thecosine wave of the carrier frequency, a sixth multiplier multiplying asignal from the fifth multiplier by the cosine wave weighted function, afirst integrator and sampler integrating a signal from the sixthmultiplier for the symbol duration time, a seventh multipliermultiplying the Q-channel by the sine wave of the carrier frequency, aneighth multiplier multiplying a signal from the seventh multiplier bythe sine wave weighted function, and a second integrator and samplerintegrating a signal from the eighth multiplier by the symbol durationtime.

It is preferable that the apparatus further comprises a signal mapperthat separates a received binary data to the I-channel and the Q-channeland outputs the I-channel and the Q-channel to the first multiplier andthe delay, respectively.

It is preferable that the apparatus further comprises a first oscillatorthat outputs the cosine wave weighted function.

It is preferable that the apparatus further comprises a first phaseshifter that phase-shifts the cosine wave weighted function output fromthe first oscillator by 90 degrees and outputs the sine wave weightedfunction.

It is preferable that the cosine wave weighted function is cos w_(i)t.

It is preferable that the cosine wave of the carrier frequency is cosw_(c)t.

It is preferable that the predetermined time is the half of a symbolduration time.

It is preferable that the apparatus further comprises a secondoscillator that outputs the cosine wave of the carrier frequency.

It is preferable that the apparatus further comprises a second phaseshifter that phase-shifts the cosine wave of the carrier frequencyoutput from the second oscillator by 90 degrees and outputs the sinewave of the carrier frequency.

It is preferable that the sine wave weighted function is sin w_(i)t.

It is preferable that the sine wave of the carrier frequency is sinw_(c)t.

It is preferable that the apparatus further comprises a phase lockedloop (PLL) that controls the phase of a received signal.

It is preferable that the apparatus further comprises a clock generatorthat receives a signal from the PLL and generates a clock cycle having apredetermined amount of time.

It is preferable that the apparatus further comprises a third phaseshifter that phase-shifts the cosine wave of the carrier frequencytransferred from the PLL by 90 degrees and generates the sine wave ofthe carrier frequency.

It is preferable that the apparatus further comprises a secondoscillator that receives the clock cycle from the clock generator andoutputs the cosine wave weighted function.

It is preferable that the apparatus further comprises a fourth phaseshifter that phase-shifts the cosine wave weighted function from thesecond oscillator by 90 degrees and outputs the sine wave weightedfunction.

It is preferable that the apparatus further comprises a first determinerthat determines an integral signal from the first integrator andsampler.

It is preferable that the apparatus further comprises a seconddeterminer that determines an integral signal from the second integratorand sampler.

It is preferable that the apparatus further comprises a signal demapperthat receives signals from the first determiner and the seconddeterminer and outputs a binary data.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and advantages of the present inventionwill become more apparent by describing in detail exemplary embodimentsthereof with reference to the attached drawings in which:

FIG. 1 is a block diagram illustrating a continuous phase quadratureamplitude modulator according to the present invention;

FIG. 2 is a block diagram illustrating a continuous phase quadratureamplitude demodulator according to the present invention; and

FIG. 3 illustrates a waveform of an output signal from the continuousphase quadrature amplitude modulator of FIG. 1.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described in more detail withreference to the accompanying drawing.

FIG. 1 is a block diagram illustrating a continuous phase quadratureamplitude modulator according to the present invention, and FIG. 2 is ablock diagram illustrating a continuous phase quadrature amplitudedemodulator according to the present invention.

Referring to FIGS. 1 and 2, a continuous phase quadrature amplitudemodulator according to the present invention includes a signal mapper100, a first multiplier 110, a second multiplier 120, a delay 130, athird multiplier 140, a fourth multiplier 150, a first oscillator 160, afirst phase shifter 170, a second oscillator 180, a second phase shifter190, and an adder 200. A continuous phase quadrature amplitudedemodulator includes a fifth multiplier 210, a sixth multiplier 220, afirst integrator and sampler 230, a first determiner 240, a seventhmultiplier 250, an eighth multiplier 260, a second integrator andsampler 270, a second determiner 280, a phase locked loop (PLL) 290, athird phase shifter 300, a clock generator 310, a fourth phase shifter320, a second oscillator 330, and a signal demapper 340.

The first multiplier 110 multiplies an I-channel by a cosine waveweighted function, and the second multiplier 120 multiplies an outputsignal of the first multiplier 110 by a cosine wave of a carrierfrequency. The delay 130 delays a Q-channel by half of the duration of asymbol duration time, and the third multiplier 140 multiplies theQ-channel by a sine wave weighted function. The fourth multiplier 150multiplies an output signal of the third multiplier 140 by the sine waveof the carrier frequency, and the adder 200 adds an output signal of thesecond multiplier 120 and an output signal of the fourth multiplier 150.Here, the signal mapper 100 separates a received binary data to theI-channel and the Q-channel and outputs the I-channel and the Q-channelto the first multiplier 110 and the delay 130, respectively. The firstoscillator 160 outputs the cosine wave weighted function. The firstphase shifter 170 phase-shifts the cosine wave weighted function outputfrom the first oscillator 160 by 90 degrees to output the sine waveweighted function. The second oscillator 180 outputs the cosine wave ofthe carrier frequency, and the second phase shifter 190 phase-shifts thecosine wave of the carrier frequency output from the second oscillator180 by 90 degrees to output the sine wave of the carrier frequency.

The cosine wave weighted function is cos w_(i)t, and the cosine wave ofthe carrier frequency is cos w_(c)t. The sine wave weighted function issin w_(i)t, and the sine wave of the carrier frequency is sin w_(c)t.

In addition, the fifth multiplier 210 multiplies the I-channel by thecosine wave of the carrier frequency, and the sixth multiplier 220multiplies a signal from the fifth multiplier 210 by the cosine waveweighted function. The first integrator and sampler 230 integrates asignal from the sixth multiplier 220 for the symbol duration time. Theseventh multiplier 250 multiples the Q-channel by the sine wave of thecarrier frequency, and the eighth multiplier 260 multiplies a signalfrom the seventh multiplier 250 by the sine wave weighted function. Thesecond integrator and sampler 270 integrates a signal from the eighthmultiplier 260 for the symbol duration time. PLL 290 controls the phaseof a received signal, and the clock generator 310 receives a signal fromthe PLL 290 to generate a clock cycle for a predetermined time. Inaddition, the third phase shifter 300 phase-shifts the cosine wave ofthe carrier frequency transferred from the PLL 290 by 90 degrees togenerate the sine wave of the carrier frequency, and the secondoscillator 330 receives the clock cycle from the clock generator 310 tooutput the cosine wave weighted function. The fourth phase shifter 320phase-shifts the cosine wave weighted function from the secondoscillator 330 by 90 degrees to output the sine wave weighted function.The first determiner 240 determines an integral signal from the firstintegrator and sampler 230, and the second determiner 280 determines anintegral signal from the second integrator and sampler 270. The signaldemapper 340 receives signals from the first determiner 240 and thesecond determiner 280 to output a binary data.

More specifically, the continuous phase quadrature amplitude modulatorof FIG. 1 maps a log₂ M bit series signal, resulting from an M-aryquarature amplitude modulation, from a mapping table to correspondingquadrature amplitude modulation signal. The log₂ M bit series signal isdivided into log₂{square root}{square root over (M)} bits and assignedto the I-channel and the Q-channel. The I-channel signal is pulse shapedinto the cosine wave weighted function of cos(Π/T_(s))t and modulatedinto the cosine wave cos w_(c)t of the carrier frequency f_(c). Here,T_(s) is the symbol duration time.

On the other hand, the Q-channel signal has a time offset of T_(s)/2from the I-channel due to the delay 130 that delays a signal by the halfof the symbol duration time. The delayed signal is pulse shaped into thesine wave weighted function of sin(Π/T_(s))t and modulated into the sinewave sin w_(c)t of the carrier frequency f_(c). The modulated I-channelsignal and the modulated Q-channel signal are added in the adder 200 andtransferred through a channel. As a result, an output M-CPQAM signalcontinues phases and amplitudes at symbol change points to improve afrequency spectrum efficiency while reducing loads of a power amplifier(not shown).

When the continuous phase quadrature amplitude demodulator of FIG. 2 isused, the cosine signal and the sine signal transferred through thechannel can be restored using the I-channel and the Q-channel becausethe cosine signal and the sine signal are orthogonal. First, theI-channel is multiplied by the cosine wave cos w_(c)t of the carrierfrequency in the fifth multiplier 210 and multiplied by the sine waveweighted function of cos(Π/T_(s))t in the sixth multiplier 220. Thefirst integrator and sampler 230 integrates the multiplied signal andsamples the integral signal to restore the signal into a base bandsignal corresponding to the Q-channel. Thereafter, a correspondingsymbol is determined using the first determiner 240. The restoredI-channel and Q-channel signals are determined into original signalsusing the mapping table.

FIG. 3 illustrates a waveform of an output signal from the continuousphase quadrature amplitude modulator of FIG. 1. Here, the waveform ofFIG. 3 is obtained by simulating a 16-quadrature amplitude modulationsignal. Referring to FIG. 3, when (3,−3), (1,−1), (3,1), and (1,−1)symbols are assigned as a 16-continuous phase quadrature amplitudemodulation signal, the phases and the amplitudes are continuous at themultiple times of four, which are symbol change points. In addition, thepresent invention is not limited to an M-ary square quadaratureamplitude modulation; however, the present invention can be applied toan optional rectangular quadrature amplitude modulation. Furthermore,the present invention can be applied to a hierarchical quadratureamplitude modulation that is proposed in digital broadcasting and othersystems using I-Q modulation.

While this invention has been particularly shown and described withreference to preferred embodiments thereof, it will be understood bythose skilled in the art that various changes in form and details may bemade therein without departing from the spirit and scope of theinvention as defined by the appended claims.

As described above, an apparatus for continuous phase quadratureamplitude modulation and demodulation according to the present inventionhas advantages as follows.

The apparatus for continuous phase quadrature amplitude modulation anddemodulation improves a spectrum efficiency by making the phases andamplitudes continuous at symbol change points of a quadrature amplitudemodulation signal, reduces an adjacent channel interference by improvingthe roll-off speed of a side-lobe, and reduces loads of a poweramplifier.

While the present invention has been particularly shown and describedwith reference to exemplary embodiments thereof, it will be understoodby those of ordinary skill in the art that various changes in form anddetails may be made therein without departing from the spirit and scopeof the present invention as defined by the following claims.

1. An apparatus for continuous phase quadrature amplitude modulation anddemodulation, the apparatus comprising: a continuous phase quadraturemodulator having a first multiplier multiplying an I-channel by a cosinewave weighted function, a second multiplier multiplying an output signalof the first multiplier by a cosine wave of a carrier frequency, a delaydelaying a Q-channel by a predetermined time, a third multipliermultiplying the Q-channel by a sine wave weighted function, a fourthmultiplier multiplying an output signal of the third multiplier by thesine wave of the carrier frequency, and an adder adding an output signalof the second multiplier and an output signal of the fourth multiplier;and a continuous phase quadrature demodulator having a fifth multipliermultiplying the I-channel by the cosine wave of the carrier frequency, asixth multiplier multiplying a signal from the fifth multiplier by thecosine wave weighted function, a first integrator and samplerintegrating a signal from the sixth multiplier for the symbol durationtime, a seventh multiplier multiplying the Q-channel by the sine wave ofthe carrier frequency, an eighth multiplier multiplying a signal fromthe seventh multiplier by the sine wave weighted function, and a secondintegrator and sampler integrating a signal from the eighth multiplierby the symbol duration time.
 2. The apparatus of claim 1, furthercomprising a signal mapper that separates a received binary data to theI-channel and the Q-channel and outputs the I-channel and the Q-channelto the first multiplier and the delay, respectively.
 3. The apparatus ofclaim 1, further comprising a first oscillator that outputs the cosinewave weighted function.
 4. The apparatus of claim 3, further comprisinga first phase shifter that phase-shifts the cosine wave weightedfunction output from the first oscillator by 90 degrees and outputs thesine wave weighted function.
 5. The apparatus of claim 1, wherein thecosine wave weighted function is cos w_(i)t.
 6. The apparatus of claim1, wherein the cosine wave of the carrier frequency is cos w_(c)t. 7.The apparatus of claim 1, wherein the predetermined time is the half ofa symbol duration time.
 8. The apparatus of claim 1, further comprisinga second oscillator that outputs the cosine wave of the carrierfrequency.
 9. The apparatus of claim 8, further comprising a secondphase shifter that phase-shifts the cosine wave of the carrier frequencyoutput from the second oscillator by 90 degrees and outputs the sinewave of the carrier frequency.
 10. The apparatus of claim 1, wherein thesine wave weighted function is sin w_(i)t.
 11. The apparatus of claim 1,wherein the sine wave of the carrier frequency is sin w_(c)t.
 12. Theapparatus of claim 1, further comprising a phase locked loop (PLL) thatcontrols the phase of a received signal.
 13. The apparatus of claim 12,further comprising a clock generator that receives a signal from the PLLand generates a clock cycle having a predetermined amount of time. 14.The apparatus of claim 12, further comprising a third phase shifter thatphase-shifts the cosine wave of the carrier frequency transferred fromthe PLL by 90 degrees and generates the sine wave of the carrierfrequency.
 15. The apparatus of claim 13, further comprising a secondoscillator that receives the clock cycle from the clock generator andoutputs the cosine wave weighted function.
 16. The apparatus of claim15, further comprising a fourth phase shifter that phase-shifts thecosine wave weighted function from the second oscillator by 90 degreesand outputs the sine wave weighted function.
 17. The apparatus of claim1, further comprising a first determiner that determines an integralsignal from the first integrator and sampler.
 18. The apparatus of claim1, further comprising a second determiner that determines an integralsignal from the second integrator and sampler.
 19. The apparatus ofclaim 17, further comprising a signal demapper that receives signalsfrom the first determiner and the second determiner and outputs a binarydata.